1. Field of the Invention
The present invention relates to a solid-stage image pickup apparatus and a method of manufacturing the same.
2. Description of the Related Art
FIGS. 37A to 37E are schematic diagrams each showing a manufacturing method and a structure of a CIS element of a back-surface irradiation type in related art.
As shown in FIG. 37A, an SOI substrate 160 has a single crystalline silicon layer 163 through a silicon oxide layer 162 (BOX layer) formed on a base substrate 161 in consideration of a photoelectric conversion efficiency with respect to a visible light region. The single crystalline silicon layer 163 has a thickness of several μm.
Next, as shown in FIG. 37B, in the single crystalline silicon layer 163, an alignment mark 174 for a back-surface lithography process is formed. Then, in the single crystalline silicon layer 163, a photoelectric converter 171, a transfer gate 173, and a peripheral circuit portion (not shown) are formed.
Next, on the single crystalline silicon layer 163, a wiring layer 181 is formed. The wiring layer 181 is constituted of a wiring 182, an electrode pad 182P, and an interlayer insulating film 183 that covers the wiring 182 and the electrode pad 182P. Then, a surface of the interlayer insulating film 183 is flattened.
Subsequently, as shown in FIG. 37C, a support substrate 164 is bonded onto the wiring layer 181. As the support substrate 164, a silicon substrate is used, or a glass substrate or a resin substrate may be used.
Subsequently, as shown in FIG. 37D, the base substrate 161 (indicated by a dashed-two-dotted line) of the SOI substrate 160 is thinned by a mechanical polishing process. Then, by performing etching, the residual base substrate 161 is removed, and the silicon oxide layer 162 (indicated by a dashed line) that forms the SOI substrate 160 is removed.
Subsequently, as shown in FIG. 37E, on the wiring layer 181, an opening portion 165 is formed from the side of the single crystalline silicon layer 163. The opening portion 165 causes the electrode pad 182P for taking out an electrode to be exposed to outside on a bottom portion thereof. In addition, a color filter 191 is formed on the single crystalline silicon layer 163 on an optical path for light that enters the photoelectric converter 171. Further, on the color filter 191, a micro lens 192 is formed. The micro lens 192 guides the incident light to the photoelectric converter 171. In this way, a solid-state image pickup apparatus 100 of the CMOS image sensor of a back-surface irradiation type is formed.
In the solid-state image pickup apparatus 100, the incident light is not reflected by the wiring layer 181. Therefore, a high sensitivity can be obtained as compared to a CMOS image sensor of a front-surface irradiation type. However, the photoelectric converter 171 has the same area as the CMOS image sensor of the front-surface irradiation type, and therefore provides the same saturation charge amount as the CMOS image sensor of the front-surface irradiation type. Accordingly, along with a reduction in pixel size, that is, along with a reduction in the area of the photoelectric converter 171, it becomes difficult to obtain a sufficient saturation charge amount. Further, due to the reduction in the pixel size, an area of an amplifier transistor is forced to be reduced, which causes a problem of increasing a noise.
To overcome the above-mentioned problem, there has been proposed a structure in which a photoelectric converter is formed not on an SOI surface but in a substrate by utilizing a feature of a CMOS image sensor of a back-surface irradiation type.
For example, as shown in FIG. 38, a pixel structure in which a photodiode PD (photoelectric converter) is formed in a silicon layer 211 has been disclosed. The formation of the photodiode PD in the silicon layer 211 prevents interference between the photodiode PD and a pixel transistor such as an amplifier transistor AMP in terms of a layout. Therefore, a size of the photodiode PD can be maximized in a pixel size. In addition, a size of the amplifier transistor AMP can also be increased to such an extent that the photodiode PD can be removed from the surface of the silicon layer 211 (see, for example, Japanese Patent Application Laid-open No. 2008-172580).
However, in order to suppress an electrical interference between the photodiode PD and the amplifier transistor AMP, a P-N junction is formed by ion implantation in the photodiode PD to a depth of about 1 μm. The ion implantation to a deep position as in this case causes a peak of a concentration to be broad. Accordingly, it is difficult to form a junction having a steep concentration profile. The saturation charge amount of the photodiode PD is proportional to the steepness of the concentration profile of the P-N junction. Therefore, the photodiode PD formed at a deep position is relatively small in the saturation charge amount in a unit area as compared to a photodiode formed on a surface of the silicon layer 211. Accordingly, an effect of forming the photodiode PD in the silicon layer 211 is not so great in the viewpoint of the saturation charge amount.